Implementing template matching logic in a standard flash memory cell

Author:

Milacic Mitar1,Dimitrijev Sima1

Affiliation:

1. Griffith University, Queensland Micro- and Nanotechnology Centre and Griffith School of Engineering, Nathan, Australia

Abstract

Current research into classification methods is almost exclusively software based, resulting in systems that perform well but are invariably slow when faced with large databases. The goal is therefore to create a hardware classification system that is much faster. In this paper, we introduce the concept of template matching logic and propose the use of a standard flash memory cell array to perform bit by bit template matching. The proposed system is based on a novel architecture that is unique and separate from existing architectures that make use of flash memory cell arrays. Verification is achieved by speech recognition simulations on the TIMIT database. Simulations of the system show results of 94.5 % recognition accuracy on clean words and 88.0 % recognition accuracy on test words with a signal-to-noise ratio of 5 dB. The results compare favorably to similar isolated word recognition tasks performed with software based methods.

Publisher

National Library of Serbia

Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Evaluation of memristor behaviour with global logic gates;2ND INTERNATIONAL CONFERENCE OF MATHEMATICS, APPLIED SCIENCES, INFORMATION AND COMMUNICATION TECHNOLOGY;2023

2. Memristor pattern recogniser: isolated speech word recognition;Electronics Letters;2015-08

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