SiGe/Si hetero nanotube JLFET for improved performance: proposal and investigation
Author:
Affiliation:
1. Electronics and Communication Engineering DepartmentNational Institute of TechnologyHamirpurHP177 005India
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/el.2019.2063
Reference13 articles.
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3. Investigation of Silicon Nanowire Gate-All-Around Junctionless Transistors Built on a Bulk Substrate
4. Effect of Band-to-Band Tunneling on Junctionless Transistors
5. Insight into Lateral Band-to-Band-Tunneling in Nanowire Junctionless FETs
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