Modelling for triple gate spin‐FET and design of triple gate spin‐FET‐based binary adder
Author:
Affiliation:
1. Department of Electronics and Instrumentation TechnologyUniversity of Kashmir, HazratbalSrinagarIndia
2. Department of ElectronicsIslamia College of Science and Commerce, HawalSrinagarIndia
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering,Control and Systems Engineering
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2019.0329
Reference21 articles.
1. Impact of Scaling on the Performance of HfO2-Based Ferroelectric Field Effect Transistors
2. Low‐power and high‐speed 13T SRAM cell using FinFETs
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4. Spin MOSFETs as a basis for integrated spin-electronics
5. Spin-Based Complementary Logic Device Using Datta–Das Transistors
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