Evaluation of circuit performance of T‐shaped tunnel FET-Reference-Cited by-同舟云学术

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Evaluation of circuit performance of T‐shaped tunnel FET

Published:2020-07-15 Issue:5 Volume:14 Page:667-673
ISSN:1751-858X
Container-title:IET Circuits, Devices & Systems
language:en
Short-container-title:IET Circuits, Devices & Systems

Author:

Dubey Prabhat Kumar¹^ORCID,Kaushik Brajesh Kumar¹^ORCID

Affiliation:

1. Department of Electronics and Communication EngineeringIIT RoorkeeRoorkee227667India

Funder

Department of Science and Technology, Ministry of Science and Technology, India

Publisher

Institution of Engineering and Technology (IET)

Subject

Electrical and Electronic Engineering,Control and Systems Engineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/iet-cds.2019.0456

Reference20 articles.

1. Designing Tunable Subthreshold Logic Circuits Using Adaptive Feedback Equalization

2. Ultralow Power Circuit Design With Subthreshold/Near-Threshold 3-D IC Technologies

3. Enhancement of a Nanoscale Novel Esaki Tunneling Diode Source TFET (ETDS-TFET) for Low-Voltage Operations

4. Improving the electrical characteristics of nanoscale triple-gate junctionless FinFET using gate oxide engineering

5. Tunnel field-effect transistors as energy-efficient electronic switches

Cited by 5 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Device and circuit-level performance evaluation of DG-GNR-DMG vertical tunnel FET;Micro and Nanostructures;2024-10

2. GaAs-on-insulator based vertical heterojunction tunnel FET: proposal and analysis for VLSI circuit applications;Physica Scripta;2024-07-24

3. Source engineered TFET for digital inverters application;Physica Scripta;2024-03-26

4. Impact of Noise and Interface Trap Charge on a Heterojunction Dual-Gate Vertical TFET Device;Journal of Electronic Materials;2024-02-07

5. Design and Comparison of Various Parameters of T-Shaped TFET of Variable Gate Lengths and Materials;Lecture Notes in Networks and Systems;2024

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