A four‐stage yield optimization technique for analog integrated circuits using optimal computing budget allocation and evolutionary algorithms
Author:
Affiliation:
1. Department of Electrical Engineering Sari Branch Islamic Azad University Sari Iran
2. Research Laboratory for Integrated Circuits Faculty of Electrical Engineering Shahid Rajaee Teacher Training University Tehran Iran
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering,Hardware and Architecture,Software
Link
https://onlinelibrary.wiley.com/doi/pdf/10.1049/cdt2.12048
Reference30 articles.
1. Modeling the Dependency of Analog Circuit Performance Parameters on Manufacturing Process Variations With Applications in Sensitivity Analysis and Yield Prediction
2. A Survey of Yield Modeling and Yield Enhancement Methods
3. Parameter-importance based Monte-Carlo Technique for Variation-aware Analog Yield Optimization
4. Computational Intelligence in Analog and Mixed-Signal (AMS) and Radio-Frequency (RF) Circuit Design
5. Statistical Analysis of ENOB and Yield in Binary Weighted ADCs and DACS With Random Element Mismatch
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