High multiplication factor capacitor multiplier for an on-chip PLL loop filter
Author:
Publisher
Institution of Engineering and Technology (IET)
Subject
Electrical and Electronic Engineering
Link
https://digital-library.theiet.org/content/journals/10.1049/el_20092874?crawler=true&mimetype=application/pdf
Reference5 articles.
1. Adaptive Miller capacitor multiplier for compact on-chip PLL filter
2. CMOS multiplier for grounded capacitors
3. A 2.4-GHz monolithic fractional-N frequency synthesizer with robust phase-switching prescaler and loop capacitance multiplier
4. Area-efficient and self-biased capacitor multiplier for on-chip loop filter
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1. Electronically Tunable Grounded and Floating Capacitance Multipliers Using a Single Active Element;Journal of Electrical and Computer Engineering;2024-05-23
2. A 14 GHz Integer-N Sub-Sampling PLL With RMS-Jitter of 85.4 fs Occupying an Ultra Low Area of 0.0918 mm2;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-02
3. New negative‐grounded capacitance multiplier circuits;International Journal of Circuit Theory and Applications;2022-11-15
4. A Low Power CMOS Analog Multiplier using Regulated Cascode Current Mirror based on Translinear principle;2022 IEEE 3rd Global Conference for Advancement in Technology (GCAT);2022-10-07
5. A tunable lossy grounded capacitance multiplier circuit based on VDTA for the low frequency operations;Analog Integrated Circuits and Signal Processing;2022-07-29
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