Two‐stage op‐amp and integrator realisation through GaAsP/AlGaSb nanowire CP‐TFET-Reference-Cited by-同舟云学术

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Two‐stage op‐amp and integrator realisation through GaAsP/AlGaSb nanowire CP‐TFET

Published:2019-08 Issue:9 Volume:14 Page:980-985
ISSN:1750-0443
Container-title:Micro & Nano Letters
language:en
Short-container-title:Micro & Nano Letters

Author:

Lemtur Alemienla¹^ORCID,Sharma Dheeraj¹,Patel Jyoti¹^ORCID,Suman Priyanka¹,Rajan Chithraja¹

Affiliation:

1. Electronics and Communication Engineering DisciplinePDPM‐Indian Institute of Information Technology, Design and ManufacturingJabalpurMP482005India

Publisher

Institution of Engineering and Technology (IET)

Subject

Condensed Matter Physics,General Materials Science,Biomedical Engineering,Bioengineering

Link

https://onlinelibrary.wiley.com/doi/pdf/10.1049/mnl.2018.5675

Reference44 articles.

1. Moore's Law Forever?

2. Double-Gate Tunnel FET With High-$\kappa$ Gate Dielectric

3. TomiokaK.YoshimuraM.FukuiT.: ‘Steep‐slope tunnel field‐effect transistors using III‐V nanowire/Si heterojunction’.2012 Symp. on VLSI Technology (VLSIT) Honolulu HI USA June2012 pp.47–48

4. Tunneling Field-Effect Transistors (TFETs) With Subthreshold Swing (SS) Less Than 60 mV/dec

5. Tunnel field-effect transistors as energy-efficient electronic switches

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2. A paradigm shift in analog applications through reconfigurable FET;Microelectronics Journal;2023-12

3. A review of III-V Tunnel Field Effect Transistors for future ultra low power digital/analog applications;Microelectronics Journal;2021-08

4. Investigation of DC, RF and Linearity Performances of III–V Semiconductor-Based Electrically Doped TFET for Mixed Signal Applications;Journal of Electronic Materials;2021-02-03

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