A 28-Nm 9t Sram-Based Cim Macro with Capacitance Weighting Module and Redundant Array-Assisted Adc
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Elsevier BV
Reference26 articles.
1. A negative capacitance FET based energy efficient 6T SRAM computing-in-memory (CiM) cell design for deep neural networks;V Birudu;Microelectron. J,2023
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