Design Time Engineering of Side Channel Resistant Cipher Implementations

Author:

Barenghi Alessandro1,Breveglieri Luca1,De Santis Fabrizio2,Melzani Filippo3,Palomba Andrea1,Pelosi Gerardo1

Affiliation:

1. Politecnico di Milano, Italy

2. Technische Universität München, Germany

3. STMicroelectronics, Italy

Abstract

Dependable and trustworthy security solutions have emerged as a crucial requirement in the specification of the applications and protocols employed in modern Information Systems (IS). Threats to the security of embedded devices, such as smart phones and PDAs, have been growing since several techniques exploiting side-channel information leakage have proven successful in recovering secret keys even from complex mobile systems. This chapter summarizes the side-channel techniques based on power consumption and elaborates the issue of the design time engineering of a secure system, through the employment of the current hardware design tools. The results of the analysis show how these tools can be effectively used to understand possible vulnerabilities to power consumption side-channel attacks, thus providing a sound conservative margin on the security level. The possible extension of this methodology to the case of fault attacks is also sketched.

Publisher

IGI Global

Reference52 articles.

1. Agosta, G., Barenghi, A., & Pelosi, G. (2012). A code morphing methodology to automate power analysis countermeasures. In Proceedings of the Design Automation Conference, (pp. 77–82). IEEE Press.

2. The EM Side—Channel(s)

3. Aitken, R., Leveugle, R., Metra, C., & Nicoladis, M. (Eds.). (2006). 12th IEEE international on-line testing symposium (IOLTS 2006). Como, Italy: IEEE Computer Society.

4. Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits

5. A general power model of differential power analysis attacks to static logic circuits. IEEE Transactions on Very Large Scale Integration (VLSI);M.Alioto;Systems,2010

Cited by 1 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Fault Sensitivity Analysis at Design Time;Trusted Computing for Embedded Systems;2014-11-03

同舟云学术

1.学者识别学者识别

2.学术分析学术分析

3.人才评估人才评估

"同舟云学术"是以全球学者为主线,采集、加工和组织学术论文而形成的新型学术文献查询和分析系统,可以对全球学者进行文献检索和人才价值评估。用户可以通过关注某些学科领域的顶尖人物而持续追踪该领域的学科进展和研究前沿。经过近期的数据扩容,当前同舟云学术共收录了国内外主流学术期刊6万余种,收集的期刊论文及会议论文总量共计约1.5亿篇,并以每天添加12000余篇中外论文的速度递增。我们也可以为用户提供个性化、定制化的学者数据。欢迎来电咨询!咨询电话:010-8811{复制后删除}0370

www.globalauthorid.com

TOP

Copyright © 2019-2024 北京同舟云网络信息技术有限公司
京公网安备11010802033243号  京ICP备18003416号-3