DESIGN OF FREQUENCY INDEPENDENT DIGITAL IQ IMBALANCE COMPENSATOR FOR RECEIVERS

Author:

Gridin I. Yu.1

Affiliation:

1. National Research University of Electronic Technology; Joint-Stock Company Research and Development Center ELVEES

Abstract

Derivation of IQ imbalance in IQ receivers because of non-idealities of analog front-end has a significant negative effect on received signal quality and serious RF system performance degradation. Thereat the RF designers have an objective to create and improve compact and stand-alone methods of IQ imbalance compensation which provide best possible Image Rejection Ratio (IRR). The DSP-based methods of compensation are the most perspective. In this paper described one of version of autonomous and adaptive frequency independent IQ imbalance compensation algorithm which can be implemented as an IP that which can be used in different SoC for RF applications. The calculation method is based on digital signal statistic estimation with real-time convergence of compensation coefficients to the goal values which provide best image rejection. The results of algorithm’s processing for different input values with different IQ imbalance values are presented with max and min image rejection ratio estimation.

Publisher

CRI Electronics

Subject

General Medicine

Reference6 articles.

1. Steila O. Automatic In-phase Quadrature Balancing AIQB, IK1XPV, 2006. Available at: http://www.qsl.net/dsp/pdf/aiqben (accessed 29.06.2018)

2. Al-Majmaie S. IQ Imbalance Compensation: Blind versus Pilot-Based Algorithms, using Different IQ Imbalance Models, Department of Electrical and Information Technology. Thesis for the degree of Master of Applies Science. Faculty of Engineering, LTH, Lund University, 2014, pp 37–40.

3. Schoonen A. M. J. M. Estimation Methods for IQ Imbalance in Multi-Standard (Near) Zero IF Receivers. Eindhoven University of Technology, 2009, pp. 40–67.

4. Implementation of Digital IQ Imbalance Compensation in OFDM WLAN Receivers, Lin K., Lin H., Wang S., Chang R. C., Department of Electrical Engineering, IEE International Symposium on Circuits and Systems, 2006, pp. 3534–3537.

5. Gridin I. Yu. Design flow for test signal model for functional verification of IP blocks of digital signal processing using MATLABSimulink. Voprosy radioelektroniki, 2017, no. 8, pp. 55–60 (In Russian).

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