Design of 1Gsps high-speed data acquisition card

Author:

Sun Xiunan,Liu Ming,Liang Hao

Abstract

Abstract In order to digitize the High-Frequency signal, a 12-bit 1Gsps RF Sampling data acquisition system is designed. The digital acquisition system includes an Analog-to-Digital Converter (ADC) daughter card and a data processing mother card equipped with Field Programmable Gate Arrays (FPGA) for communication, which has an external DDR3 memory module and a Gigabit Ethernet Interface. It focuses on the hardware system implementation of the daughter card and the realization of data receiving, transferring, and sending based on the FPGA. The test results show that the Effective Number of Bit (ENOB) of the acquisition card is above 9.1 Bits. Both Integral Non-Linear (INL) and Differential Non-Linearity (DNL) are anticipated. It accomplishes the requirements for engineering applications in many fields excellently.

Publisher

IOP Publishing

Subject

General Physics and Astronomy

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