STTSRL: Design of Triple-Node Upset Self-Recovery Latch Based on Schmidt Trigger

Abstract

Abstract With the continuous progress of semiconductor technology, the size of transistors has reduced, and the sensitivity of logic circuits to soft errors caused by radiation has enhanced. The multiple-node upset caused by radiation has affected the reliability of the circuit. This paper proposes a triple-node upset (TNU) self-recovery latch based on the Schmidt trigger (ST) for radiation hardness. The feedback loop is formed by connecting C-elements (CEs) and STs. Using the error filtering mechanism of CE and the hysteresis effect of ST is to realize the reliability of STTSRL. Under the 22 nm PTM process in HSPICE simulation, the STTSRL latch has TNU self-recoverability. Compared with the average value of the same recoverability latch proposed previously, the power consumption, delay, area, number of transistors, and PDAP are reduced by 44.85%, 53.32%, 40.34%, 19.24%, and 83.54%, respectively.