A fast, ultra-low and frequency-scalable power consumption, 10-bit SAR ADC for particle physics detectors
Author:
Publisher
IOP Publishing
Subject
Mathematical Physics,Instrumentation
Link
http://stacks.iop.org/1748-0221/10/i=11/a=P11012/pdf
Reference18 articles.
1. A fast, low-power, 6-bit SAR ADC for readout of strip detectors in the LHCb Upgrade experiment
2. A 10-bit 200-MS/s CMOS parallel pipeline A/D converter
3. Input switch configuration suitable for rail-to-rail operation of switched opamp circuits
4. Offset voltage analysis of dynamic latched comparator
5. A 10-bit 100-MS/s Reference-Free SAR ADC in 90 nm CMOS
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2. An ultra-low power 10-bit, 50 MSps SAR ADC for multi-channel readout ASICs;Journal of Instrumentation;2023-11-01
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4. HKROC: an integrated front-end ASIC to readout photomultiplier tubes for the Hyper-Kamiokande experiment;Journal of Instrumentation;2023-01-01
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