Author:
Zhao 赵 Zi-Miao 梓淼,Chen 陈 Zi-Xin 子馨,Liu 刘 Wei-Jing 伟景,Tang 汤 Nai-Yun 乃云,Liu 刘 Jiang-Nan 江南,Liu 刘 Xian-Ting 先婷,Li 李 Xuan-Lin 宣霖,Pan 潘 Xin-Fu 信甫,Tang 唐 Min 敏,Li 李 Qing-Hua 清华,Bai 白 Wei 伟,Tang 唐 Xiao-Dong 晓东
Abstract
Dual-metal gate and gate–drain underlap designs are introduced to reduce the ambipolar current of the device based on the C-shaped pocket TFET(CSP-TFET). The effects of gate work function and gate–drain underlap length on the DC characteristics and analog/RF performance of CSP-TFET devices, such as the on-state current (I
on), ambipolar current (I
amb), transconductance (g
m), cut-off frequency (f
T) and gain–bandwidth product (GBP), are analyzed and compared in this work. Also, a combination of both the dual-metal gate and gate–drain underlap designs has been proposed for the C-shaped pocket dual metal underlap TFET (CSP-DMUN-TFET), which contains a C-shaped pocket area that significantly increases the on-state current of the device; this combination design substantially reduces the ambipolar current. The results show that the CSP-DMUN-TFET demonstrates an excellent performance, including high I
on (9.03 × 10−9 A/μm), high I
on/I
off (∼1011), low SSavg (∼13 mV/dec), and low I
amb (2.15 × 10−2 A/μm). The CSP-DMUN-TFET has the capability to fully suppress ambipolar currents while maintaining high on-state currents, making it a potential replacement in the next generation of semiconductor devices.
Subject
General Physics and Astronomy
Cited by
1 articles.
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