Performance Analysis of the 2nd Order Phase Lock Loop when Phase Modulation is Added to the Voltage Controlled Oscillator

Author:

Chatterjee Basab1,Biswas B. N.2

Affiliation:

1. Department of Applied Electronics and Instrumentation Engineering, Academy of Technology, Adisaptagram, Hooghly 712121

2. Education Division, SKF Group of Institution, Mankundu, Hooghly 712139

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering,Computer Science Applications,Theoretical Computer Science

Reference6 articles.

1. B N Biswas, “Phase Lock Theories and Applications”, New Delhi : Oxford and IBH; 1985. p. 291–309.

2. W F Egan, “Phase Lock Basics”, New York: Wiley-Interscience 1998. p. 81–105.

3. B Chaterjee, S Sarkar, and B N Biswas, “A New Split-Loop DPLL”, Chicago: URSI GA; 2008. p. 7–16.

4. B N Biswas, “Software defined active microstrip patch antenna receiver”, Microwave Conference Proceedings, Asia-Pacific Conference Proceedings, APMC 2005.

5. D Brian, and F Ronan, “Stability Analysis of High Frequency Digital Phase Lock Loop using Piecewise Linear Model”, Iris Signals and Systems Conference, IET–28–30, pp. 395–400, Jun. 2006.

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