Substrate bias effect of epitaxial delta-doped channel MOS transistor for low-power applications-Reference-Cited by-同舟云学术

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Substrate bias effect of epitaxial delta-doped channel MOS transistor for low-power applications

Published:2016-05-23 Issue:1 Volume:104 Page:47-63
ISSN:0020-7217
Container-title:International Journal of Electronics
language:en
Short-container-title:International Journal of Electronics

Author:

Sengupta Sarmista,Sikdar Subhrajit,Pandit Soumya

Funder

Technical Education Quality Improvement Program TEQIP-Phase-II, University of Calcutta

Publisher

Informa UK Limited

Subject

Electrical and Electronic Engineering

Link

http://www.tandfonline.com/doi/pdf/10.1080/00207217.2016.1180546

Reference18 articles.

1. Semi-empirical model for the threshold voltage of a double implanted MOSFET and its temperature dependence

2. Suppression of random dopant-induced threshold voltage fluctuations in sub-0.1-μm MOSFET's with epitaxial and δ-doped channels

3. MOSFET design for forward body biasing scheme

4. 25-nm Gate Length nMOSFET With Steep Channel Profiles Utilizing Carbon-Doped Silicon Layers (A P-Type Dopant Confinement Layer)

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Unified Model of Drain Current Local Variability due to Channel Length Fluctuation for an n-channel Eδ DC MOS Transistor;Silicon;2021-07-31

2. Analysis of Drain Current Local Variability of an n-Channel E $\delta$ DC MOSFET Due to RDD Considering Inversion Charge and Correlated Mobility Fluctuations;IEEE Transactions on Electron Devices;2018-04

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