A general structure of all-edges-triggered flip-flop based on multivalued clock
Author:
Publisher
Informa UK Limited
Subject
Electrical and Electronic Engineering
Link
http://www.tandfonline.com/doi/pdf/10.1080/00207217.2012.751325
Reference16 articles.
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2. DESIGN OF 3-VALUED R-S & D FLIP-FLOPS BASED ON SIMPLE TERNARY GATES
3. Direct synthesis of suspended single-walled carbon nanotubes crossing plasma sharpened carbon nanofibre tips
4. Design of a Low-Power Quaternary Flip-Flop Based on Dynamic Differential Logic
5. Pecar, P. Janez, M., Zimic, N., Mraz, M., and Bajec, I.L. (2009), ‘The Ternary Quantum-dot Cellular Automata Memorizing Cell’, inIEEE Computer Society Annual Symposium on VLSI, 2009 (ISVLSI “09), pp. 223– 228
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5. Design of ternary clock generator;Electronics Letters;2014-07
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