1. H. T. Kung and
C. E. Leiserson , Systolic arrays (for VLSI) , Tech. Rep. CS-79-103 , Carnegie Mellon University , Pittsburg , PA , Apr. 1978 .
2. Why systolic architectures?
3. Optimizing systolic networks by fitting diagonals
4. M. Gušev and
D. J. Evans , Folding transformations for systolic processor arrays , Tec Rep. 643 , Loughborough University of Technology, PARC, Dept. of Computer Studies , Oct. 1991 . Par. Comp. 18 ( 1992 ), 525 – 542 .