Author:
Mohanty Soumya S.,Mishra Sikha,Sathpathy Debatanaya,Mishra Guru Prasad
Reference22 articles.
1. Frank, D.J., Dennard, R.H., Nowak, E., Solomon, P.M., Taur, Y., Wong, H.S.P.: Device scaling limits of Si MOSFETs and their application dependencies. Proc. IEEE 89, 259–288 (2001)
2. Chang, L., Choi, Y.K., Ha, D., Ranade, P., Xiong, S., Bokor, J., Hu, C., King, T.J.: Extremely scaled silicon nano-CMOS devices. Proc. IEEE 91, 1860–1873 (2003)
3. Majumdar, A., Ren, Z., Sleight, J.W., Dobuzinsky, D., Holt, J.R., Venigalla, R., Koester, S.J., Haensch, W.: High-performance undoped-body 8-nm-thin SOI field-effect transistors. IEEE Electron Device Lett. 29, 515–517 (2008)
4. Ganesh, C., Patil, N., Qureshi, S.: Underlap channel metal source/drain SOI MOSFET for thermally efficient low-power mixed-signal circuits. Microelectron. J. 43, 321–328 (2012)
5. Singh, M., Mishra, S., Mohanty, S.S., Mishra, G.P.: Performance analysis of SOI MOSFET with rectangular recessed channel. Adv. Nat. Sci. Nanosci. Nanotechnol. 7, 015010 (2016). (8 pp)