Author:
Madhan Bommidi,Anita J. P.
Reference12 articles.
1. Anita, J.P., Sudheesh, P.: Test power reduction and test pattern generation for multiple faults using zero suppressed decision diagrams. Int. J. High Perform. Syst. Arch. 6(1), 51–60 (2016)
2. Ye, J., Zhang, X., Hu, Y., Li, X.: Substantial fault pair at-a-time (SFPAT): an automatic diagnostic pattern generation method. In: Proceedings of ATS, pp. 192–197, Dec 2010
3. McCluskey, E.G., Clegg, F.W.: Fault equivalence in combinational logic networks. IEEE Trans. Comput. C-20(11), 1286–1293 (1971)
4. Mohan, N., Anita, J.P.: A zero suppressed binary decision diagram based test set relaxation for single and multiple stuck-at faults. Int. J. Math. Model. Numer. Optim. 7(1), 83–96 (2016)
5. Lin, Y.-C., Lu, F., Cheng, K.T.: Multiple-fault diagnosis based on adaptive diagnostic test pattern generation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(5), 932–942 (2007)