Author:
Tripathi Sayan,Jana Jhilam,Samanta Jagannath,Raj Aman,Ranjan Deep,Singh Mayank Pratap
Reference12 articles.
1. Neale, A., Jonkman, M., Sachdev, M.: Adjacent-MBU-tolerant SEC-DED-TAEC-$$y$$AED codes for embedded SRAMs. IEEE Trans. Circ. Syst. II: Express Br. 62(4), 387–391 (2015)
2. Neale, A., Sachdev, M.: A new SEC-DED error correction code subclass for adjacent MBU tolerance in embedded memory. IEEE Trans. Device Mater. Reliab. 13(1), 223–230 (2013)
3. Ibe, E., Taniguchi, H., Yahagi, Y., Shimbo, K.I., Toba, T.: Impact of scaling on neutron-induced soft error in SRAMs from a 250 nm to a 22 nm design rule. IEEE Trans. Electron Device 57(7), 1527–1538 (2010)
4. Dutta, A., Touba, N.A.: Multiple bit upset tolerant memory using a selective cycle avoidance based SEC-DED-DAEC code. In: 25th IEEE VLSI Test Symposium, pp. 349–354. IEEE (2007)
5. Dixit, A., Wood, A.: The impact of new technology on soft error rates. In: 2011 IEEE International Reliability Physics Symposium (IRPS), pp. 5B–4. IEEE (2011)
Cited by
5 articles.
订阅此论文施引文献
订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献