Design of Energy Efficient IoMT Electrocardiogram (ECG) Machine on 28 nm FPGA
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Publisher
Springer Nature Singapore
Link
https://link.springer.com/content/pdf/10.1007/978-981-99-6034-7_3
Reference38 articles.
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3. Aggarwal, A., Pandey, B., Dabbas, S., Agarwal, A., Saurabh, S.: LVCMOS-based low-power thermal-aware energy-proficient vedic multiplier design on different FPGAs. In: Muttoo, S.K. (ed.) System and Architecture, pp. 115–122. Springer (2018). https://doi.org/10.1007/978-981-10-8533-8_12
4. Altini, M., Polito, S., Penders, J., Kim, H., Van Helleputte, N., Kim, S., Yazicioglu, F.: An ECG patch combining a customized ultra-low-power ECG SOC with bluetooth low Energy for long term ambulatory monitoring. In: Proceedings of the 2nd Conference on Wireless Health, pp. 1–2. https://doi.org/10.1145/2077546.2077564 (2011)
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