Vulnerability Analysis of FPGA Through Side-Channel Attacks in Cloud

Author:

Harini S.,Ravikumar Aswathy

Publisher

Springer Singapore

Reference23 articles.

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3. Standaert FX et al (2003) A methodology to implement block ciphers in reconfigurable hardware and its application to fast and compact AES Rijndael. In: The field programmable logic array conference, Monterey, CA, pp 216–224

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5. McLoone W, McCanny JV (2001) Rijndael FPGA implementation utilizing look-up tables Signal Processing Systems. In: 2001 IEEE workshop on signal processing systems, pp 349–360

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