TeLEx: learning signal temporal logic from positive examples using tightness metric-Reference-Cited by-同舟云学术

TeLEx: learning signal temporal logic from positive examples using tightness metric

Published:2019-01-23 Issue:3 Volume:54 Page:364-387
ISSN:0925-9856
Container-title:Formal Methods in System Design
language:en
Short-container-title:Form Methods Syst Des

Author:

Jha Susmit^ORCID,Tiwari Ashish,Seshia Sanjit A.,Sahai Tuhin,Shankar Natarajan

Funder

Directorate for Computer and Information Science and Engineering

Army Research Laboratory

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/s10703-019-00332-1.pdf

Reference43 articles.

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2. Abbas H, Winn A, Fainekos G, Julius AA (2014) Functional gradient descent method for metric temporal logic specifications. In: American control conference (ACC). IEEE, pp 2312–2317

3. Akazaki T (2016) Falsification of conditional safety properties for cyber-physical systems with gaussian process regression. In: International conference on runtime verification. Springer, pp 439–446

4. Aksaray D, Jones A, Kong Z, Schwager M, Belta C (2016) Q-learning for robust satisfaction of signal temporal logic specifications. In: IEEE 55th conference on decision and control (CDC). IEEE, pp 6565–6570

5. Angluin D (1988) Identifying languages from stochastic examples. Technical report, YALEU/DCS/RR-614, Yale University. Department of Computer Science

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