Author:
Tang Lu,Wang Zhigong,Qiu Yinghua,Zhang Changchun,Xu Jian
Publisher
Springer Science and Business Media LLC
Subject
Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing
Reference20 articles.
1. Deng, L., Zhang, M., Liu, D., Qian, Y., & Yang, K. (2011). OFDMA-based LAN emulation in long-reach hybrid PON system. Optics Communications, 284(3), 740–746.
2. Chen Y.-H., Chen, W.-Z. (2012). A 0.6-7 Gbps, 1/7 rate, burst mode clock and data recovery circuit and demultiplexer. 2012 IEEE Radio Frequency Integrated Circuits Symposium-Digest of Papers, 531-534.
3. Fan, B., Dai, Y., Zhang, X., & Lu, Y. (2009). Low power clock recovery circuit for passive HF RFID tag. Analog Integrated Circuits and Signal Processing, 59(2), 207–214.
4. Shi, S., Wang, Z., Zhang, C., et al. (2012). 5 Gb/s 2:1 fully-integrated full-rate multiplexer with on-chip clock generation circuit in 0.18-µm CMOS. Analog Integrated Circuits and Signal Processing, 72(2), 469–480.
5. Kong, W. (2005). Low phase noise design techniques for phase locked loop based integrated RF frequency synthesizers. College Park: University of Maryland.
Cited by
2 articles.
订阅此论文施引文献
订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献