Clock harmonic distortion reduction technique for full tunable range in switched-R-MOSFET-C filters

Author:

Soto-Aguilar Sergio,Alagappan Arunvenkatesh,Sanchez-Sinencio Edgar

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Reference11 articles.

1. Xiao, S., Silva, J., Un-Ku, M. & Temes, G. (2004). A tunable duty-cycle-controlled switched-R-MOSFET-C CMOS filter for low-voltage and high-linearity applications. In Proceedings of the 2004 International Symposium on Circuits and Systems. ISCAS ’04, vol. 1, pp. I-433-6.

2. Xin, M. & Temes, G. C. (2014). Bootstrapping techniques for floating switches in switched-capacitor circuits, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), 57, pp. 398–401.

3. Kaehler, J. A. (1969). Periodic-switching filter networks-a means of amplifying and varying transfer functions. IEEE Journal of Solid-State Circuits, 4, 225–230.

4. Kurahashi, P., Hanumolu, P. K., Temes, G. C., & Un-Ku, M. (2007). Design of low-voltage highly linear switched-R-MOSFET-C filters. IEEE Journal of Solid-State Circuits, 42, 1699–1709.

5. Alagappan, A., Soto-Aguilar, S. & Sanchez-Sinencio, E. (2014). Reduced clock harmonic distortion technique in maximum tunable switched-R-MOSFET-C filters, 2014 IEEE 57th International Midwest Symposium on Circuits and Systems (MWSCAS), pp. 1037–1040.

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