Design of modified low power CMOS differential ring oscillator using sleepy transistor concept-Reference-Cited by-同舟云学术

Design of modified low power CMOS differential ring oscillator using sleepy transistor concept

Published:2018-05-10 Issue:1 Volume:96 Page:87-104
ISSN:0925-1030
Container-title:Analog Integrated Circuits and Signal Processing
language:en
Short-container-title:Analog Integr Circ Sig Process

Author:

Gupta Prachi,Kumar Manoj

Publisher

Springer Science and Business Media LLC

Subject

Surfaces, Coatings and Films,Hardware and Architecture,Signal Processing

Link

http://link.springer.com/article/10.1007/s10470-018-1205-6/fulltext.html

Reference23 articles.

1. Park, J. C., & Mooney, V. J. (2006). Sleepy stack leakage reduction. IEEE Transactions on VLSI Systems, 14(11), 1250–1263.

2. Chang, M. C., Chang, C. S., Chao, C. P., & Goto, K. I. (2008). Transistor and circuit design optimization for low power CMOS. IEEE Transactions on Electron Devices, 55(1), 84–95.

3. Kumar, M., Arya, S. K., & Pandey, S. (2012). Low power voltage controlled ring oscillator design with substrate biasing. IJIEE, II(2), 156–159.

4. Subramanyan, B. S., & Nunez, A. (2007). Analysis of sub threshold leakage reduction in CMOS digital cirtuits. In Proceedings of the 13th NASA VLSI symposium, pp. 1400–1404, June 2007.

5. Razavi, B. (2002). Design of analog CMOS integrated circuits. Tata McGraw-Hill Education.

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