Author:
Ilamathi K.,Rangarajan P.
Publisher
Springer Science and Business Media LLC
Subject
Computer Networks and Communications,Software
Reference26 articles.
1. Shafaghi, S., Shokouhifar, M., Sabbaghi-Nadooshan, R.: Swarm intelligence low power routing in network on chips. Int. J. Energy Inf. Commun. 7(2), 21–40 (2016)
2. Sparso, J., Stensgaard, M.B.: ReNoC: a network-on-chip architecture with reconfigurable topology in networks-on-chip. In: Second ACM/IEEE International Symposium, pp. 55–64. (2008)
3. Martin, A.J., Steininger, A.: Asynchronous techniques for systems-on-chip design. Proc. IEEE 94(6), 1089–1120 (2009)
4. Karthikeyan, A., Kumar, P.S.: GALS implementation of randomly prioritized buffer-less routing architecture for 3D NoC. Clust. Comput. (2017).
https://doi.org/10.1007/s10586-017-0979-0
5. Moraes, F., Calazans, N., Mello, A., Moller, L., Ost, L.: Hermes: an infrastructure for low area overhead packet-switching networks on chip. Integr. VLSI J. 38(1), 69–93 (2004)
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