Building a push-button RESOLVE verifier: Progress and challenges

Author:

Sitaraman Murali1,Adcock Bruce2,Avigad Jeremy3,Bronish Derek2,Bucci Paolo2,Frazier David1,Friedman Harvey M.24,Harton Heather1,Heym Wayne2,Kirschenbaum Jason2,Krone Joan5,Smith Hampton1,Weide Bruce W.2

Affiliation:

1. School of Computing, Clemson University, 29634, Clemson, SC, USA

2. Department of Computer Science and Engineering, The Ohio State University, 43210, Columbus, OH, USA

3. Department of Philosophy, Carnegie Mellon University, 15213, Pittsburgh, PA, USA

4. Department of Mathematics, The Ohio State University, 43210, Columbus, OH, USA

5. Department of Mathematics and Computer Science, Denison University, 43023, Granville, OH, USA

Abstract

Abstract A central objective of the verifying compiler grand challenge is to develop a push-button verifier that generates proofs of correctness in a syntax-driven fashion similar to the way an ordinary compiler generates machine code. The software developer’s role is then to provide suitable specifications and annotated code, but otherwise to have no direct involvement in the verification step. However, the general mathematical developments and results upon which software correctness is based may be established through a separate formal proof process in which proofs might be mechanically checked, but not necessarily automatically generated. While many ideas that could conceivably form the basis for software verification have been known “in principle” for decades, and several tools to support an aspect of verification have been devised, practical fully automated verification of full software behavior remains a grand challenge. This paper explains how RESOLVE takes a step towards addressing this challenge by integrating foundational and practical elements of software engineering, programming languages, and mathematical logic into a coherent framework. Current versions of the RESOLVE verifier generate verification conditions (VCs) for the correctness of component-based software in a modular fashion—one component at a time. The VCs are currently verified using automated capabilities of the Isabelle proof assistant, the SMT solver Z3, a minimalist rewrite prover, and some specialized decision procedures. Initial experiments with the tools and further analytic considerations show both the progress that has been made and the challenges that remain.

Publisher

Association for Computing Machinery (ACM)

Subject

Theoretical Computer Science,Software

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