A novel technique for flit traversal in network-on-chip router
Author:
Publisher
Springer Science and Business Media LLC
Subject
Computational Mathematics,Computational Theory and Mathematics,Computer Science Applications,Numerical Analysis,Theoretical Computer Science,Software
Link
https://link.springer.com/content/pdf/10.1007/s00607-023-01200-x.pdf
Reference37 articles.
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2. Kamal R, Juan M, Arostegui M (2018) A multi-synchronous bi-directional NoC (MBiNoC) architecture with dynamic self-reconfigurable channel for the GALS infrastructure. Alex Eng J 57:739–754. https://doi.org/10.1016/j.aej.2017.02.019
3. Jung DC, Davidson S, Zhao C, Richmond D, Taylor M and Ruche B (2020) Networks: wire-maximal, no-fuss NoCs: special session paper. In: Proceedings of the 2020 14th IEEE/ACM international symposium on networks-on-chip (NOCS), Hamburg, Germany, pp 1–8
4. Kamal R, Juan M, Arostegui M (2021) Network-on-chip topologies: potentials, technical challenges. Recent Adv Res Direct 57:739–754. https://doi.org/10.5772/intechopen.97262
5. Masahiro N, Maaki S, Yoshiko H, Hitoshi M, Mitsuhisa S (2021) Graph optimization algorithm for low-latency interconnection networks. Parallel Comput 106:102805. https://doi.org/10.1016/j.parco.2021.102805
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