Toward novel designs of reversible ternary 6:2 Compressor using efficient reversible ternary full-adders-Reference-Cited by-同舟云学术

Toward novel designs of reversible ternary 6:2 Compressor using efficient reversible ternary full-adders

Published:2020-11-03 Issue:5 Volume:77 Page:5176-5197
ISSN:0920-8542
Container-title:The Journal of Supercomputing
language:en
Short-container-title:J Supercomput

Author:

Asadi Mohammad-Ali,Mosleh Mohammad^ORCID,Haghparast Majid

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Information Systems,Theoretical Computer Science,Software

Link

http://link.springer.com/content/pdf/10.1007/s11227-020-03485-7.pdf

Reference38 articles.

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3. Islam MS et al (2009) Synthesis of fault tolerant reversible logic circuits. In: Circuits and Systems International Conference on Testing and Diagnosis, 2009, ICTD 2009. IEEE, pp 1–4

4. Azad Khan M (2002) Design of full adder with reversible gate. In International Conference on Computer and Information Technology, Dhaka, Bangladesh, pp 515–519

5. Khan MHA (2008) A recursive method for synthesizing quantum/reversible quaternary parallel adder/subtractor with look-ahead carry. J Syst Architect 54(12):1113–1121

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