Analysing software prefetching opportunities in hardware transactional memory-Reference-Cited by-同舟云学术

Analysing software prefetching opportunities in hardware transactional memory

Published:2021-06-02 Issue:1 Volume:78 Page:919-944
ISSN:0920-8542
Container-title:The Journal of Supercomputing
language:en
Short-container-title:J Supercomput

Author:

Shimchenko Marina,Titos-Gil Rubén^ORCID,Fernández-Pascual Ricardo^ORCID,Acacio Manuel E.^ORCID,Kaxiras Stefanos^ORCID,Ros Alberto^ORCID,Jimborean Alexandra^ORCID

Funder

Vetenskapsrådet

European Research Council

Ministerio de Ciencia, Innovación y Universidades

Publisher

Springer Science and Business Media LLC

Subject

Hardware and Architecture,Information Systems,Theoretical Computer Science,Software

Link

https://link.springer.com/content/pdf/10.1007/s11227-021-03897-z.pdf

Reference35 articles.

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2. Ansari M, Luján M, Kotselidis C, Jarvis K, Kirkham C, Watson I (2009) Steal-on-abort: improving transactional memory performance through dynamic transaction reordering. In: Proceedings of the High Performance Embedded Architectures and Compilers, pp 4–18

3. ARM Ltd Transactional Memory Extension (TME) intrinsics. https://developer.arm.com/documentation/101028/0011/Transactional-Memory-Extension--TME--intrinsics

4. Binkert N, Beckmann B, Black G, Reinhardt SK, Saidi A, Basu A, Hestness J, Hower DR, Krishna T, Sardashti S, Sen R, Sewell K, Shoaib M, Vaish N, Hill MD, Wood DA (2011) The gem5 simulator. Comput Arch News 39(2):1–7

5. Dash A, Demsky B (2010) Automatically generating symbolic prefetches for distributed transactional memories. In: Middleware 2010. Lecture Notes in Computer Science, vol 6452