MIPS: A VLSI Processor Architecture-Reference-Cited by-同舟云学术

MIPS: A VLSI Processor Architecture

Published:1981 Issue: Volume: Page:337-346
ISSN:
Container-title:VLSI Systems and Computations
language:
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Author:

Hennessy John,Jouppi Norman,Baskett Forest,Gill John

Publisher

Springer Berlin Heidelberg

Link

http://link.springer.com/content/pdf/10.1007/978-3-642-68402-9_37.pdf

Reference5 articles.

1. Baskett, F. Puzzle: an informal compute bound benchmark, widely circulated and run

2. Henncssy, J.L. SLIM: A Language for Simulation and PLA Generation in VLSI. Tech. Rept. 195, Computer Systems Laboratory, Stanford University, 1980.

3. Lampson, B.W., McDaniel, G.A. and S.M. Ornstein. An Instruction Fctch Unit for a High Performance Personal Computer. Tech. Rept. CSL-81-1, Xerox PARC, Jan, 1981

4. Patterson, D.A. and Sequin C.H. RISC-I: A Reduced Instruction Set VLSI Computer. Proc. of the Eighth Annual Symposium on Computer Architecture, Minneapolis, Minn., May, 1981.

5. Widdoes, L.C. The S-l Project: Developing high performance digital computers. Proc. Compcon, IEEE, San Francisco, Feb, 1980.

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