Floorplanning for Area Optimization Using Parallel Particle Swarm Optimization and Sequence Pair
Author:
Publisher
Springer Science and Business Media LLC
Subject
Electrical and Electronic Engineering,Computer Science Applications
Link
https://link.springer.com/content/pdf/10.1007/s11277-020-08015-5.pdf
Reference41 articles.
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3. Chan, H. H., & Markov, I. L. (2004). Practical slicing and non-slicing block-packing without simulated annealing. In Proceedings of the 14th ACM Great Lakes symposium on VLSI, Boston, MA, USA (pp. 282–287).
4. Chen, T.-C., & Chang, Y.-W. (2006). Modern floorplanning based on B/sup */-tree and fast simulated annealing. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 25(4), 637–650. https://doi.org/10.1109/TCAD.2006.870076.
5. Sassone, P. G., & Kyulim, S. (2006). Traffic: A novel geometric algorithm for fast wire-optimized floorplanning. IEEE Transactions On Computer-Aided Design of Integrated Circuits and Systems, 25, 6.
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