An Efficient, Low-Cost Routing Architecture for Spiking Neural Network Hardware Implementations-Reference-Cited by-同舟云学术

An Efficient, Low-Cost Routing Architecture for Spiking Neural Network Hardware Implementations

Published:2018-02-09 Issue:3 Volume:48 Page:1777-1788
ISSN:1370-4621
Container-title:Neural Processing Letters
language:en
Short-container-title:Neural Process Lett

Author:

Luo Yuling,Wan Lei,Liu Junxiu^ORCID,Harkin Jim,Cao Yi

Funder

National Natural Science Foundation of China

Natural Science Foundation of Guangxi Province

Overseas 100 Talents Programme of Guangxi Higher Education

Research Project of Guangxi University of China

Guangxi Key Lab of Multi-source Information Mining & Security

Doctoral Research Foundation of Guangxi Normal University

Research Project of Guangxi Centre of Humanities & Social Sciences - Ecological Environment Forecast and Harnessing in Ecologically Vulnerable Region of Pearl River and Xijiang Economic Zone

Innovation Project of Guangxi Graduate Education

Publisher

Springer Science and Business Media LLC

Subject

Artificial Intelligence,Computer Networks and Communications,General Neuroscience,Software

Link

http://link.springer.com/article/10.1007/s11063-018-9797-5/fulltext.html

Reference22 articles.

1. Carrillo S, Harkin J, Mcdaid L, Pande S, Cawley S, Mcginley B, Morgan F (2012) Advancing interconnect density for spiking neural network hardware implementations using traffic-aware adaptive network-on-chip routers. Neural Netw 33:42–57

2. Yang W, Yang J, Wu W (2012) A modified spiking neuron that involves derivative of the state function at firing time. Neural Process Lett 36:135–144

3. Meftah B, Lezoray O, Benyettou A (2010) Segmentation and edge detection based on spiking neural network model. Neural Process Lett 31:131–146

4. Carrillo S, Harkin J, McDaid LJ, Morgan F, Pande S, Cawley S, McGinley B (2013) Scalable hierarchical network-on-chip architecture for spiking neural network hardware implementations. IEEE Trans Parallel Distrib Syst 24:2451–2461

5. Liu J, Harkin J, Li Y, Maguire L (2015) Low cost fault-tolerant routing algorithm for networks-on-chip. Microprocess Microsyst 39:358–372

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