Low-Power CMOS Random Access Memory Circuits
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Publisher
Springer US
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http://link.springer.com/content/pdf/10.1007/978-1-4615-2355-0_6.pdf
Reference50 articles.
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3. Y. Maki et al., “A 6.5-ns 1 Mb BiCMOS ECL SRAM,” International Solid-State Circuits Conf. Tech. Dig., pp. 136–137, February 1990.
4. M. Takada et al., “A 5-ns 1-Mb ECL BiCMOS SRAM,” IEEE Journal of Solid State Circuits, vol. 25, no. 5, pp. 1057–1062, October 1990.
5. A. Ohba et al., “A 7-ns 1-Mb BiCMOS ECL SRAM with Program-Free Redundancy,” in Symp. VLSI Circuits Conf. Tech. Dig., pp. 41–42, May 1990.
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