Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench-Reference-Cited by-同舟云学术

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Algorithmic and Register-Transfer Level Synthesis: The System Architect’s Workbench

Published:1990 Issue: Volume: Page:
ISSN:0893-3405
Container-title:The Kluwer International Series in Engineering and Computer Science
language:
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Author:

Thomas D. E.,Lagnese E. D.,Walker R. A.,Nestor J. A.,Rajan J. V.,Blackburn R. L.

Publisher

Springer US

Link

http://link.springer.com/content/pdf/10.1007/978-1-4613-1519-3.pdf

Cited by 25 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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4. HLS Algorithmic Explorations for HPC Execution on Reconfigurable Hardware - ECOSCALE;Applied Reconfigurable Computing. Architectures, Tools, and Applications;2018

5. Comparing C and SystemC Based HLS Methods for Reconfigurable Systems Design;Applied Reconfigurable Computing. Architectures, Tools, and Applications;2018

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