1. H.A. Mantooth and P.E. Allen, ?Behavioral simulation of a 3-bit flash ADC,? inIEEE Proc. 1990 Int. Symp. Circuits Syst., New Orleans, LA, pp. 1356?1359, 1990.
2. G.R. Boyle, B.R. Cohn, D.O. Pederson, and J.E. Solomon, ?Macromodeling of integrated circuit operational amplifiers,?IEEE J. Solid-State Circuits, Vol. SC-9, pp. 353?363, 1974.
3. I.E. Getreu, A.D. Hadiwidjaja, and J.M. Brinch, ?An integrated-circuit comparator macromodel,?IEEE J. Solid-State Circuits, Vol. SC-11, pp. 826?833, 1976.
4. I.E. Getreu, ?Behaviorial modeling of analog blocks using the Saber simulator,? inProc. 32nd Midwest Symp. Circuits Syst., Univ. of Illinois, Urbana-Champaign, pp. 977?980, 1989.
5. C. Visweswariah, R. Chadha, and C. Chen, ?Model development and verification for high level analog blocks,? inIEEE Proc. Design Automation Conf., pp. 376?382, 1988.