Jagged Tiling for Intra-tile Parallelism and Fine-Grain Multithreading-Reference-Cited by-同舟云学术

Jagged Tiling for Intra-tile Parallelism and Fine-Grain Multithreading

Published:2015 Issue: Volume: Page:161-175
ISSN:0302-9743
Container-title:Languages and Compilers for Parallel Computing
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Author:

Shrestha Sunil,Manzano Joseph,Marquez Andres,Feo John,Gao Guang R.

Publisher

Springer International Publishing

Link

http://link.springer.com/content/pdf/10.1007/978-3-319-17473-0_11

Reference27 articles.

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3. Baskaran, M.M., et al.: Automatic data movement and computation mapping for multi-level parallel architectures with explicitly managed memories. In: Proceedings of the 13th ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, pp. 1–10. ACM (2008)

4. Bastoul, C.: Generating loops for scanning polyhedra: cloog users guide. Polyhedron 2, 10 (2004)

5. Bikshandi, G., et al.: Programming for parallelism and locality with hierarchically tiled arrays. In: Proceedings of the Eleventh ACM SIGPLAN Symposium on Principles and Practice of Parallel Programming, PPoPP 2006, pp. 48–57. ACM, New York (2006)

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