FPGA implementation of 10 G Ethernet-based DAQ systems for pixel detectors

Author:

Li Hang-xuORCID,Zhang Jie,Ding Ye,Cui Shan-shan,Wang Zheng,Jiang Xiao-shan

Funder

National Basic Research Program of China (973 Program)

Publisher

Springer Science and Business Media LLC

Subject

Nuclear Energy and Engineering,Nuclear and High Energy Physics

Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. ASIC Design and Implementation of Ten Gigabit Ethernet Transceiver;2024 International Telecommunications Conference (ITC-Egypt);2024-07-22

2. Control Electronics for One-Coordinate X-Ray Detectors;2024 IEEE 25th International Conference of Young Professionals in Electron Devices and Materials (EDM);2024-06-28

3. A Dual Module Parallel Readout System Based on 10 Gb TCP/IP Transmission for HEPS-BPIX Detector;IEEE Transactions on Nuclear Science;2021-11

4. A study of UDP and TCP FPGA implementation for data acquisition system;Journal of Instrumentation;2021-07-01

5. FPGA-based 10G/40G Ethernet Firmware for Pixel Detector in SHINE;Radiation Detection Technology and Methods;2021-06-23

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