Design of Low-Power CMOS VCO with Three Transistors NAND Gate and MOS Varactor-Reference-Cited by-同舟云学术

Design of Low-Power CMOS VCO with Three Transistors NAND Gate and MOS Varactor

Published:2023-05-20 Issue:4 Volume:104 Page:851-858
ISSN:2250-2106
Container-title:Journal of The Institution of Engineers (India): Series B
language:en
Short-container-title:J. Inst. Eng. India Ser. B

Author:

Kumar Manoj^ORCID

Publisher

Springer Science and Business Media LLC

Subject

Electrical and Electronic Engineering,General Computer Science

Link

https://link.springer.com/content/pdf/10.1007/s40031-023-00898-9.pdf

Reference29 articles.

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3. H. Thabet, S. Meillere, M. Masmoudi, J.L. Seguin, H. Barthelemy, K. Aguir, A low power consumption CMOS differential-ring VCO for a wireless sensor. Analog Integr. Circ. Sig. Process 73, 731–740 (2012)

4. B. Catli and M. M. Haskell, A 0.5V 3.6/5.2 GHz CMOS multi-band VCO for ultra-low-voltage wireless applications. In: IEEE International Symposium on Circuits and Systems, pp. 996–999 (2008)

5. Y.A. Eken, J.P. Uyemura, A 5.9-ghz voltage controlled ring oscillator in 0.18-um CMOS. IEEE J. Solid-State Circuits 39(1), 230–233 (2004)

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