TSV Characterization and Modeling

Author:

Stucchi Michele,Katti Guruprasad,Velenis Dimitrios

Publisher

Springer US

Reference18 articles.

1. Topol AW et al (2006) Three-dimensional integrated circuits. IBM J Res Dev 50(4/5):491–506

2. Beyne E (2006) The rise of the 3rd dimension for system integration. In: Proceedings of international interconnect technology conference, Burlingame, CA, 5–7 June, pp 1–5

3. Pak JS, Ryu C, Kim J (2007) Electrical characterization of through silicon via (TSV) depending on structural and material parameters based on 3D full wave simulation. In: Proceedings of international conference on electronic materials and packaging, Daejeon, 19–22 November, pp 19–22

4. Van Olmen J et al (2008) 3D stacked IC demonstration using a through silicon via first approach. IEDM Technical Digest pp 603–606

5. Kamon M, Silveira L et al (1996) FastHenry USER’S GUIDE: version 3.0, Massachusetts Institute of Technology, November, ftp://rle-vlsi.mit.edu/pub/fasthenry

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