CAD for Hardware/Software Security Verification

Author:

Farahmandi Farimah,Rahman M. Sazadur,Rajendran Sree Ranjani,Tehranipoor Mark

Publisher

Springer International Publishing

Reference33 articles.

1. T. Aitch, A Pipelined RISC CPU Aquarius (SuperH-2 ISA Compatible CPU Core) (2003). http://www.opencores.info/projects.cgi/web/aquarius/

2. ARM Security Technology Building a Secure System using TrustZone Technology. https://developer.arm.com/documentation/genc009492/c

3. K.Z. Azar, M.M. Hossain, A. Vafaei, H. Al Shaikh, N.N. Mondol, F. Rahman, M. Tehranipoor, F. Farahmandi, Fuzz, penetration, and AI testing for SoC security verification: challenges and solutions. Cryptology ePrint Archive (2022)

4. B. Bailey, A new vision for scalable verification. EE Time (February 18th, 2004)

5. S. Bhasin, T.E. Carlson, A. Chattopadhyay, V.B.Y. Kumar, A. Mendelson, R. Poussier, Y. Tavva, Secure your SoC: building system-an-chip designs for security, in 2020 IEEE 33rd International System-on-Chip Conference (SOCC). (IEEE, 2020), pp. 248–253

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