Publisher
Springer Nature Switzerland
Reference107 articles.
1. G. Madrigal-Boza, M. Oviedo-Hernández, A. Carmona-Cruz, et al., An IC mixed-signal framework for design, optimization, and verification of high-speed links. IEEE 11th Latin American symposium on circuits & systems (LASCAS-2020) (2020), pp. 1–4
2. http://irufa.blogspot.com/2011/11/computer-hardware-basics-computer.html
3. M. Lee, W. Dally, P. Chiang, Low-power area-efficient high-speed I/O circuit techniques. IEEE J. Solid State Circuits 35, 1591–1599 (2000)
4. A. Agrawal, Design of High Speed I/O Interfaces for High Performance Microprocessors (Harvard University, Cambridge 2010), 119 p
5. Jedec DDR standards & specification document. June, 2017