Successive Approximation Conversion
Author:
Publisher
Springer International Publishing
Link
https://link.springer.com/content/pdf/10.1007/978-3-030-90808-9_16
Reference40 articles.
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2. H. Wei et al., An 8-b 400-MS/s 2-b-Per-Cycle SAR ADC with resistive DAC. IEEE J. Solid-State Circuits 47, 2763–2772 (2012)
3. J.L. McCreary, P.R. Gray, All-MOS charge redistribution analog-to-digital conversion techniques I. IEEE J. Solid-State Circuits 10, 371–379 (1975)
4. P.J.A. Harpe, E. Cantatore, A.H.M. van Roermund, An oversampled 12/14b SAR ADC with noise reduction and linearity enhancements achieving up to 79.1dB SNDR, in International Solid-State Circuits Conference, Digest of Technical Papers (2014), pp. 194–195
5. M. Inerfield, A. Kamath, J. Hu, V. Fong, O. Alnaggar, T. Kwan, An 11.5-ENOB 100-MS/s 8 mW dual-reference SAR ADC in 28 nm CMOS, in Symposium on VLSI Circuits Digest (2014), pp. 192–193
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