A Memory Reliability Enhancement Technique for Multi Bit Upsets
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Published:2020-10-30
Issue:4
Volume:93
Page:439-459
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ISSN:1939-8018
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Container-title:Journal of Signal Processing Systems
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language:en
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Short-container-title:J Sign Process Syst
Author:
Chabot AlexandreORCID, Alouani Ihsen, Nouacer Réda, Niar Smail
Publisher
Springer Science and Business Media LLC
Subject
Hardware and Architecture,Modeling and Simulation,Information Systems,Signal Processing,Theoretical Computer Science,Control and Systems Engineering
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1. Implementation of Multi Bit Error Detection and Correction using Low Density Parity Check Codes;2022 1st IEEE International Conference on Industrial Electronics: Developments & Applications (ICIDeA);2022-10-15
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